Description

In some applications (such as cumulative flow), when the controller receives a 32-bit unsigned integer from a third-party device, there is no unsigned math available to perform calculations. Therefore, the number must be converted to a IEEE floating point format in order to perform unsigned math. The following ladder logic converts a 32-bit unsigned integer into REAL data, while interpreting the top most bit as a data bit rather than a sign bit.

Warning: A REAL (32-bit IEEE floating point number) uses 8 bits to store the exponent and the sign and only 24 bits to store the mantissa, which is the equivalent of 7 or 8 significant base-10 digits. Converting to REAL may result in the loss of significant digits for numbers with more than 7 significant base-10 digits.

Resolution

Below is an alternative programming method for use on PACsSystems RX3i and RX7i controllers.

The mnemonics below can be copied and pasted into a temporary program block, for formatting, and then that logic can be copied from the temporary block and pasted into any existing program block as formatted logic. The extra step to paste to a temporary block avoids unformatted paste problems that can overwrite existing logic. Please note that you must create a Word or Integer Array named, UDint_Words with a of Length 2x0, BEFORE pasting the mnemonics into the logic.

COMMENT /* The following rung moves the Unsinged DINT words into an array of length 2, UDint_Words, preparing for the conversion to Real. */; END_RUNG;

H_WIRE; MOVE_DINT 1 UDint_1,G UDint_Words,G; END_RUNG;

COMMENT /* The following rung converts the Array Words into two separate reals Reals so that the sign can be ignored later. */; END_RUNG;

H_WIRE; UINT_TO_REAL UDint_Words[0],G UReal_0,G; H_WIRE; H_WIRE; UINT_TO_REAL UDint_Words[1],G UReal_1,G; END_RUNG;

COMMENT /* The following rung shifts the high word of the Unsigned DINT 16 bits to the left and then recombines to form the desired Real. */; END_RUNG;

H_WIRE; MUL_REAL UReal_1,G 65536.0 **; H_WIRE; ADD_REAL ** UReal_0,G Real_32,G; R+; C+1; C+1; H_WIRE;